I think my favourite bonkers CPU architecture was the NUON where I wrote assembler for its 4-cpu VLIW setup. Each of which CPUs only had a little bit of memory and you had to DMA in data and code overlays on the fly.
I think my favourite bonkers CPU architecture was the NUON where I wrote assembler for its 4-cpu VLIW setup. Each of which CPUs only had a little bit of memory and you had to DMA in data and code overlays on the fly.
Sound sorta' like coding bitslice (although not the same).